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A data logger receives a stream of ASCII characters over UART at varying rates. The receive buffer is small (16 bytes), so the firmware must implement XON/XOFF-style software flow control to avoid losing data during bursts.

The protocol is simple: track how full the ring buffer is. When the fill level reaches a high watermark, the firmware enters the "paused" (XOFF) state. When the level drops back to a low watermark, it re-enters the "ready" (XON) state. Only state *transitions* are counted (no duplicate signals while already paused or already ready).

After the incoming stream goes idle, the firmware prints a summary:

DATA:<all received characters in order> XOFF:<number of XOFF transitions> XON:<number of XON transitions>

Each summary line ends with a newline character (\n), and the UART output is matched exactly. The graded stream must contain only these three summary lines: track XOFF/XON as internal state transitions and do not transmit the raw XOFF (0x13) or XON (0x11) control bytes on the UART.

For example, if 5 characters arrive slowly enough that the buffer never fills: DATA:ABCDE, XOFF:0, XON:0.

If 14 characters arrive in a rapid burst, the buffer fills past the high watermark once and later drains past the low watermark once: DATA:ABCDEFGHIJKLMN, XOFF:1, XON:1.

Buffer parameters (defined in the starter code): Ring buffer size: 16, High watermark: 12, Low watermark: 4.

Design contract: service one byte per main loop iteration. If a new byte has arrived, push it into the ring; when no new byte has arrived, drain at most one byte from the ring. The graded transition counts depend on this pacing.

The starter code provides register definitions, UART TX helpers, and the ring buffer storage. You need to implement the ring buffer operations, the receive/drain loop, watermark checking, and the idle-timeout summary output.

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