Crash Site

A field-deployed sensor node keeps rebooting. Before each reset, the watchdog handler captures the ARM Cortex-M SCB fault registers into a crash dump and uploads it to this diagnostic terminal over UART.

Your firmware receives a 16-byte crash dump (little-endian uint32s: CFSR, HFSR, MMFAR, BFAR), decodes the fault registers, and prints a human-readable diagnosis.

The CFSR (Configurable Fault Status Register at 0xE000ED28) is a composite 32-bit register: Bits [7:0] = MMFSR (MemManage Fault Status) Bits [15:8] = BFSR (Bus Fault Status) Bits [31:16] = UFSR (Usage Fault Status)

Expected output structure for a bus fault with valid address: CRASH DUMP ANALYSIS CFSR:0x<8 hex digits> HFSR:0x<8 hex digits> ESCALATED (printed when HFSR shows forced escalation) BUS FAULT: <status bit name, e.g. PRECISERR> BFAR:0x<8 hex digits> (printed only when the BFAR address is valid) DONE

The decoder compiles cleanly but produces incorrect output for every crash dump it receives. Find and fix the three bugs.