Flood

A colleague built a DMA-based UART transmit pipeline. The firmware receives 4-byte data packets via USART1 polling, formats a response string in a shared buffer, and transmits each response via DMA2 Stream 7.

Expected UART output for each packet: RX:<b0>,<b1>,<b2>,<b3>

Where b0-b3 are the decimal ASCII values of the received bytes. For example, receiving "ABCD" should produce: RX:65,66,67,68

At low data rates (packets spaced apart), the output looks correct. But when packets arrive back-to-back, earlier responses vanish or come out garbled. Find and fix the bug.