Census

STM32 I2C Scanner Exercise

Task

Once after reset, print every address a bench device answers on I2C1. The registers and bit fields are on the Datasheet tab.

Circuit

Block diagram: U1, an STM32F4, drives SCL on PB6 and SDA on PB7 to a bus with pull-ups R1 and R2 to 3V3 and room for up to three devices, U2 to U4, at addresses not known in advance; PA9 carries USART1 TX to J1, a serial console

Pass condition

One line per device, 0x and two uppercase hex digits, in address order, then DONE: and the count. The bus is free when the scan ends.

Expected output on the bench board: the lines 0x3C, 0x48 and 0x68, one per device in address order, then DONE colon 3 on the serial console

Notes

The given code brings up USART1 and I2C1, clock included. uart_puts, uart_hex and uart_dec print. Other cases fit other devices, or none.

Related challenges

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