Quicksand

STM32 UART Command Parser Debug

Symptom

After the host sends some non-command lines, replies still come, but PA5 and PA6 stop following commands. STATUS answers a nonsense count. The registers and bit fields are on the Datasheet tab.

Circuit

Bench wiring: J1, the host serial port, is crossed to U1 an STM32F4 on PA10 and PA9; PA5 and PA6 drive the IN1 and IN2 inputs of U2, an H-bridge that runs motor M1, with logic analyzer channels on both lines

Pass condition

Every line gets its reply from figure 2. The pins follow the last motor command, whatever came before it.

Expected replies and pin levels: FWD sets PA5 high and PA6 low and replies DIR:FWD, REV the opposite with DIR:REV, STOP both low with DIR:STOP, STATUS leaves the pins and replies CMDS with the number of motor commands since reset, any other line leaves them and replies ERR; then one graded exchange, FWD, REPORT:UPTIME=00012345, REV and STATUS answered DIR:FWD, ERR, DIR:REV and CMDS:2, ending with PA5 low and PA6 high

Notes

The host sends commands and chatter alike for as long as the board runs. RAM budget: 1 KB static (.data plus .bss), 512 bytes of stack.

Related challenges

Loading the interactive arena.